Hardware

Simulated Components

Note

Any implementation defined here requires physical hardware

ADC Simulation

Rev H modules feature a simulated ADC mode. Normally for pulse processing, the ADC digitizes the analog signal connected to the module. In the simulated mode, fast-rising, exponentially decaying pulses are generated at pseudo-random times. The resulting traces, when plotted, will look akin to

Provided you have the appropriate hardware, this mode can be toggled by setting bit 26 of CHANNEL_CSRA to 1.